? semiconductor components industries, llc, 2012 august, 2012 ? rev. 14 1 publication order number: mjd44h11/d mjd44h11, njvmjd44h11 (npn), mjd45h11, njvmjd45h11 (pnp) complementary power transistors dpak for surface mount applications designed for general purpose power and switching such as output or driver stages in applications such as switching regulators, converters, and power amplifiers. features ? lead formed for surface mount application in plastic sleeves (no suffix) ? straight lead version in plastic sleeves (? ? 1? suffix) ? electrically similar to popular d44h/d45h series ? low collector emitter saturation v oltage ? v ce(sat) = 1.0 volt max @ 8.0 a ? fast switching speeds ? complementary pairs simplifies designs ? epoxy meets ul 94 v ? 0 @ 0.125 in ? esd ratings: human body model, 3b 8000 v machine model, c 400 v ? njv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q101 qualified and ppap capable ? these are pb ? free packages* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. silicon power transistors 8 amperes 80 volts, 20 watts ipak case 369d style 1 dpak case 369c style 1 marking diagrams a = assembly location y = year ww = work week j4xh11 = device code x = 4 or 5 g=pb ? free package 1 2 3 4 ayww j4 xh11g see detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ordering information 1 2 3 4 ayww j4 xh11g http://onsemi.com
mjd44h11, njvmjd44h11 (npn), mjd45h11, njvmjd45h11 (pnp) http://onsemi.com 2 maximum ratings (t a = 25 c, common for npn and pnp, minus sign, ? ? ?, for pnp omitted, unless otherwise noted) rating symbol max unit collector ? emitter voltage v ceo 80 vdc emitter ? base voltage v eb 5 vdc collector current ? continuous ? peak i c 8 16 adc total power dissipation @ t c = 25 c derate above 25 c p d 20 0.16 w w/ c total power dissipation (note 1) @ t a = 25 c derate above 25 c p d 1.75 0.014 w w/ c operating and storage junction temperature range t j , t stg ? 55 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. thermal characteristics characteristic symbol max unit thermal resistance, junction ? to ? case r jc 6.25 c/w thermal resistance, junction ? to ? ambient (note 1) r ja 71.4 c/w lead temperature for soldering t l 260 c 1. these ratings are applicable when surface mounted on the minimum pad sizes recommended.
mjd44h11, njvmjd44h11 (npn), mjd45h11, njvmjd45h11 (pnp) http://onsemi.com 3 electrical characteristics (t a = 25 c, common for npn and pnp, minus sign, ? ? ?, for pnp omitted, unless otherwise noted) characteristic symbol min typ max unit off characteristics collector ? emitter sustaining voltage (i c = 30 ma, i b = 0) v ceo(sus) 80 vdc collector cutoff current (v ce = rated v ceo , v be = 0) i ces 1.0 a emitter cutoff current (v eb = 5 vdc) i ebo 1.0 a on characteristics collector ? emitter saturation voltage (i c = 8 adc, i b = 0.4 adc) v ce(sat) 1 vdc base ? emitter saturation voltage (i c = 8 adc, i b = 0.8 adc) v be(sat) 1.5 vdc dc current gain (v ce = 1 vdc, i c = 2 adc) h fe 60 ? dc current gain (v ce = 1 vdc, i c = 4 adc) 40 dynamic characteristics collector capacitance (v cb = 10 vdc, f test = 1 mhz) mjd44h11, njvmjd44h11g,/t4g/rlg mjd45h11, njvmjd45h11t4g/rlg c cb 45 130 pf gain bandwidth product (i c = 0.5 adc, v ce = 10 vdc, f = 20 mhz) mjd44h11, njvmjd44h11g,/t4g/rlg mjd45h11, njvmjd45h11t4g/rlg f t 85 90 mhz switching times delay and rise times (i c = 5 adc, i b1 = 0.5 adc) mjd44h11, njvmjd44h11g,/t4g/rlg mjd45h11, njvmjd45h11t4g/rlg t d + t r 300 135 ns storage time (i c = 5 adc, i b1 = i b2 = 0.5 adc) mjd44h11, njvmjd44h11g,/t4g/rlg mjd45h11, njvmjd45h11t4g/rlg t s 500 500 ns fall time (i c = 5 adc, i b1 = i b2 = 0.5 adc mjd44h11, njvmjd44h11g,/t4g/rlg mjd45h11, njvmjd45h11t4g/rlg t f 140 100 ns
mjd44h11, njvmjd44h11 (npn), mjd45h11, njvmjd45h11 (pnp) http://onsemi.com 4 t, time (ms) 1 0.01 1 k 0.3 0.2 0.07 r(t), effective transient thermal r jc(t) = r(t) r jc r jc = 6.25 c/w max d curves apply for power pulse train shown read time at t 1 t j(pk) - t c = p (pk) jc(t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 0.01 resistance (normalized) 0.7 figure 1. thermal response 0.5 0.1 0.05 0.03 0.02 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10 20 30 50 100 200 300 500 0.2 single pulse d = 0.5 0.1 0.02 0.01 0.05 i c , collector current (amp) 20 1 v ce , collector-emitter voltage (volts) 0.02 3 100 2 0.5 5 0.1 thermal limit @ t c = 25 c wire bond limit 5 7 20 70 10 100 s dc 0.05 0.3 1 3 10 50 30 figure 2. maximum forward bias safe operating area 1ms 500 s 5ms there are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. safe operating area curves indicate i c ? v ce limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. the data of figure 2 is based on t j(pk) = 150 c; t c is variable depending on conditions. second breakdown pulse limits are valid for duty cycles to 10% provided t j(pk) 150 c. t j(pk) may be calculated from the data in figure 1. at high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 25 25 t, temperature ( c) 0 50 75 100 125 150 20 15 10 5 p d , power dissipation (watts) 2.5 0 2 1.5 1 0.5 t a t c figure 3. power derating t c t a surface mount
mjd44h11, njvmjd44h11 (npn), mjd45h11, njvmjd45h11 (pnp) http://onsemi.com 5 figure 4. mjd44h11 dc current gain figure 5. mjd45h11 dc current gain i c , collector current (a) 10 1 0.1 0.01 10 100 1000 figure 6. mjd44h11 dc current gain figure 7. mjd45h11 dc current gain figure 8. mjd44h11 saturation voltage v ce(sat) figure 9. mjd45h11 saturation voltage v ce(sat) i c , collector current (a) i c , collector current (a) 10 1 0.1 0.01 0 0.1 0.2 0.3 0.4 0.6 0.7 0.8 h fe , dc current gain v ce(sat) , coll ? emit saturation voltage (v) 150 c ? 55 c 25 c v ce = 1 v i c , collector current (a) 10 1 0.1 0.01 10 100 1000 h fe , dc current gain 150 c ? 55 c 25 c v ce = 1 v i c , collector current (a) 10 1 0.1 0.01 10 100 1000 h fe , dc current gain 150 c ? 55 c 25 c v ce = 4 v i c , collector current (a) 10 1 0.1 0.01 10 100 1000 h fe , dc current gain 150 c ? 55 c 25 c v ce = 4 v 0.5 150 c ? 55 c 25 c ic/ib = 20 i c , collector current (a) 10 1 0.1 0.01 0 0.1 0.2 0.3 0.4 0.6 0.7 0.8 v ce(sat) , coll ? emit saturation voltage (v) 0.5 150 c ? 55 c 25 c ic/ib = 20
mjd44h11, njvmjd44h11 (npn), mjd45h11, njvmjd45h11 (pnp) http://onsemi.com 6 figure 10. mjd44h11 saturation voltage v be(sat) figure 11. mjd45h11 saturation voltage v be(sat) i c , collector current (a) i c , collector current (a) 10 1 0.1 0.01 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 figure 12. mjd44h11 collector saturation region figure 13. mjd45h11 collector saturation region i b , base current (ma) i b , base current (ma) 10,000 1000 100 10 1 0.1 0 0.4 0.2 0.6 1.0 1.4 1.8 2.0 figure 14. mjd44h11 capacitance figure 15. mjd45h11 capacitance v r , reverse voltage (v) 100 10 1 0.1 10 100 1000 v be(sat) , base ? emit saturation voltage (v) v ce , collector ? emitter voltage (v) c, capacitance (pf) 150 c ? 55 c 25 c ic/ib = 20 10 1 0.1 0.01 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v be(sat) , base ? emit saturation voltage (v) 150 c ? 55 c 25 c ic/ib = 20 0.8 1.2 1.6 t a = 25 c i c = 8 a 1 a i c = 3 a 0.5 a i c = 0.1 a 10,000 1000 100 10 1 0.1 0 0.4 0.2 0.6 1.0 1.4 1.8 2.0 v ce , collector ? emitter voltage (v) 0.8 1.2 1.6 t a = 25 c cob v r , reverse voltage (v) 100 10 1 0.1 10 100 1000 c, capacitance (pf) cob i c = 8 a 1 a i c = 3 a 0.5 a i c = 0.1 a
mjd44h11, njvmjd44h11 (npn), mjd45h11, njvmjd45h11 (pnp) http://onsemi.com 7 figure 16. mjd44h11 current ? gain ? bandwidth product figure 17. mjd45h11 current ? gain ? bandwidth product i c , collector current (a) i c , collector current (a) 10 1 0.1 0.01 10 100 10 1 0.1 0.01 10 100 f ta u , current ? gain ? bandwidth product f ta u , current ? gain ? bandwidth product v ce = 2 v v ce = 2 v ordering information device package type package shipping ? mjd44h11g dpak (pb ? free) 369c 75 units / rail njvmjd44h11g dpak (pb ? free) mjd44h11 ? 1g dpak ? 3 (pb ? free) 369d mjd44h11rlg dpak (pb ? free) 369c 1,800 / tape & reel njvmjd44h11rlg dpak (pb ? free) mjd44h11t4g dpak (pb ? free) 2,500 / tape & reel njvmjd44h11t4g dpak (pb ? free) mjd44h11t5g dpak (pb ? free) mjd45h11g dpak (pb ? free) 75 units / rail mjd45h11 ? 1g dpak ? 3 (pb ? free) 369d mjd45h11rlg dpak (pb ? free) 369c 1,800 / tape & reel NJVMJD45H11RLG dpak (pb ? free) mjd45h11t4g dpak (pb ? free) 2,500 / tape & reel njvmjd45h11t4g dpak (pb ? free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
mjd44h11, njvmjd44h11 (npn), mjd45h11, njvmjd45h11 (pnp) http://onsemi.com 8 package dimensions dpak case 369c issue d style 1: pin 1. base 2. collector 3. emitter 4. collector 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw
mjd44h11, njvmjd44h11 (npn), mjd45h11, njvmjd45h11 (pnp) http://onsemi.com 9 package dimensions 123 4 v s a k ? t ? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? ipak case 369d issue c style 1: pin 1. base 2. collector 3. emitter 4. collector on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 mjd44h11/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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